Power factor correction circuits having configuration of so-called boost converters have been known. In International Publication No. 2010/023978 and Japanese Patent Application Laid-Open No. 2011-223865 listed below, for example, a pair of boost converters are provided, and a so-called interleaved method is adopted.
Operations of such boost converters involve switching, and thus involve phenomena of switching loss, generation of harmonics, and, eventually, generation of leakage current. In order to improve these phenomena, in Japanese Patent Application Laid-Open No. 2009-291034 and Japanese Patent Application Laid-Open No. 2011-019323 listed below, a discontinuous mode is adopted in operation of a boost converter when a load is small, and a critical mode of the boost converter is adopted when the load is large. Similarly, in International Publication No. 2010/023978, a discontinuous mode is adopted at a low load, and a critical mode or a continuous mode is adopted at a high load.
The terms “discontinuous mode”, “critical mode”, and “continuous mode” should originally be used as for a current mode of current flowing through a reactor of a boost converter. In the present application, however, these terms are also used to express an operating mode of the boost converter having the reactor, for convenience's sake.
Adoption of the discontinuous mode in operation of the boost converter at a low load as described above reduces switching frequency in an operating area in which a power component of harmonics is small, and thereby achieves reduction of a harmonic power component and reduction of switching loss.
Japanese Patent No. 3044650 discloses technology for compensating leakage current, which is described later.